This application relates to design of electrical circuits and semiconductor devices and, more particularly, to a knowledge based expert system for transforming a high level design entered by a user to a technology level representation of the design needed to manufacture a semiconductor device incorporating the design.
Design of an integrated circuit (IC) semiconductor device begins with a specification describing the overall function of the device. For example, a multiplier circuit may be specified to multiply two numbers together. If the input characteristics of the two numbers are known and the characteristics of the resultant output are known, the overall function of the multiplier circuit can be described. Other factors, such as power consumption, number of input and output connectors (I/O pins), and timing, may be included in the overall description of the circuit.
Semiconductor devices may be manufactured by a wide variety of processes or "technologies," such as TTL (transistor-transistor logic), CMOS (complementary metal oxide semiconductor), NMOS (N-channel metal oxide semiconductor), etc. Thus, it is important to be able to transform a generic high-level logic design into circuit components of a technology appropriate to a specific application.
A description of the desired circuit that spells out in detail the characteristics of the completed circuit is known as a high level design description. For example, a high level logic design description or, more simply, a high-level design may spell out the characteristics of a multiplier circuit. Such a description may specify one or more types of components, but does not necessarily designate specific components or how the components are connected. From the perspective of the opposite end of the design process, the required output of the process is a series of instructions which can be used by production machinery to actually form semiconductor raw materials into patterns and layers of metal and semiconductor material forming the desired circuit and to fabricate the IC device on a production line. Such a series of instructions is known as a "technology level representation" of the circuit.
The process of transforming the high-level design into a technology level representation is called "logic synthesis." The high-level design is initially represented in an artificial intelligence data base. The data base may include many different types of elements performing many different types of functions. Examples of elements are model definitions, model instances, port definitions, port instances, and signals. These elements are described in more detail below. The data base may also contain elements performing the same functions, but having different operating characteristics. Elements can be combined in many different combinations, but of course, not every type of element is operable with every other type, and not all elements within a given type are operable with all other elements of the same type.
There are, thus, a large number of "rules," which govern the combinations of elements within the data base. The logic synthesis process continuously and iteratively alters the design stored in the data base according to the rules. Thus, the logic synthesis process creates a more and more detailed description of a set of elements within the data base. The final result of the logic synthesis process is a technology representation that can be manufactured with, for example, computer aided manufacturing (CAM) techniques.
Logic synthesis thus involves selecting and combining elements of the data base according to the rules to transform a high-level design, which is initially stored in the data base, to a technology level representation.
Typically, the data base contains a library of logic element "model definitions" that are organized by function (e.g., Boolean components, adders, etc.) and by technology (e.g., TTL, CMOS, etc.) and a library of rules (a "rules library") for applying to specific instances of the model definitions.
One such data base is described in the above-referenced application Ser. No. 06/907,303, the disclosure of which is herein expressly incorporated by reference. In this data base, each model definition has associated parameters that describe function, timing, power, size, and other general attributes of circuit components. Each model definition has associated with it one or more "model instances." Each model instance describes a component that meets the criteria of the model definition.
The rules library typically contains hundreds of rules that are organized into one or more "rule bases" according to rule type and applicability. The rules are associated with the model definitions, model instances, and rule bases through a set of pointers that are established when the rules library is loaded into the data base.
The high-level design description is usually a detailed specification of the desired behavior of the device to be designed. As the high level design is loaded into the system, it is described by an initial set of model instances that are typically quite generic, i.e., the initial model instances usually do not define any specific component or technology. As described in the above-identified application, a set of bidirectional pointers are established by the data base between the initial model instances so that the initial set of model instances are interconnected to define the design at a high level. A pointer is also established between each model instance and the model definition with which it is associated in the data base, and pointers are also established between each such model definition and the rules in the rule base that are associated with it. A single model definition may have more than one associated model instance. However, a single model instance is an instance of only one model definition.
The rules are then tested and applied to each model instance according to a predetermined procedure to determine if the model instance (and possibly adjacent model instances connected to the model instance via the bidirectional pointers) can be replaced with new model instances, which are more specific in either in function or technology or both. As model instances are replaced by more specific model instances through the application of the rules, bidirectional pointers are established between the new set of model instances to again define the logic design, this time at a slightly more specific level. Rules are then applied to the model definitions pointed to by this set of model instances to replace them with an even more specific set of model instances.
This iterative procedure continues until the original high level design description has been transformed to a low level description of the design implemented with circuit elements chosen from the technology (such as CMOS) targeted by the user. This low-level description constitutes a final design, which is in the form of a data structure that represents an interconnection between the actual components that are to be used to manufacture the design. The data structure can then be input to a conventional Computer Aided Manufacturing (CAM) system in the form of instruction for fabricating the synthesized logic design.
Each of the model instances has associated with it a number of "parameters," which describe such aspects of the model instance as signal timing, pinout, and technology type such as TTL. Each parameter of a model instance has a parameter value for that instance. For example, both a first model instance and a second model instance may have a parameter A, describing signal timing. The parameter of the first model instance may have a parameter A value of 10 microseconds, however, while the parameter of the second model instance has a parameter A value of 5 microseconds.
Existing logic synthesis methods use various methods to determine which rules to apply first. A first existing logic synthesis method scans through all the rules each time a rule is sought to be applied to a given model definition to find the best rule for that definition. This first method can result in relatively long synthesis processing times. A second existing logic synthesis method partitions the rules into classes and subclasses so that fewer than all of the rules are tested when a rule needs to be applied to a model definition. This second existing method uses a pattern matching scheme to compare a rule test against a single component and its properties. A third existing logic synthesis method that is satisfactory when the target technology can be defined by boolean tree cells configures the component library as a forest of logic trees and structures the rules tests in the same manner. A series of abstract pattern matches are then made to test the rules.
In existing logic synthesis methods, the rules are generally applied with respect to all model instances in the design, which leads to relatively long run times if the design is very complex or the data base is quite large. Existing logic synthesis methods continue to apply rules with respect to every model instance currently present in the design, even if all but a few of the instances have reached stable form (i.e., have reached the appropriate level of functionality and the target technology). Thus, run time is needlessly spent applying rules to model instances that will not be changed further by the application of the rules.
It is often desirable to isolate a small, but critical, area of a circuit to be synthesized and to synthesize only that small part. Run time is unnecessarily long if all parts of a circuit must be synthesized at every pass. Alternately, a user may wish to synthesize a small portion of a circuit in several different technology representations.